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Applications Engineering, Principal Engineer

Synopsys

Berlin · On-site Lead €72k – €84k/yr 2w ago

About the role

About

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self‑driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high‑performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Our Customer Success Group business is all about building high‑performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. We design the next‑generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.

Role

Physical Design Specialist (PDS) – Customizable by manager – Title describing work – not formal title

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Responsibilities

  • The primary focus of the Physical Design Specialist (PDS) is to support the sale and adoption of Synopsys products to help customers achieve tangible and lasting performance improvements in cost, quality, and development time for projects.
    • PDS AEs are expected to possess Place & Route (physical), Synthesis (logical and physical), STA experience and knowledge.
    • PDS AEs are expected to be knowledgeable in multiple domains of design implementation and understand codependency of flow and methodology such as Macro & Standard Cell Placement, Clock Tree Synthesis, Routing, Advanced Timing Optimization techniques.
    • Additional knowledge of AI‑driven methodologies, RTL coding, synthesis, equivalency check, constraints (timing & power sign‑off) is preferable.
  • Articulate design methodologies involving Synopsys tools at a very advanced node (Sub 5nm) using Synopsys Full RTL‑to‑GDSII solution (Fusion Compiler / IC Compiler II / ICC2).
    • Development time will be spent gaining expertise in additional or specialization tools, broadening focus from product emphasis to methodology, sharpening account management skills, and learning to leverage success.
  • Manage multiple customer activities concurrently, and work with Account Managers and AC management to set priorities.
    • Sales support roles include product demonstrations, evaluations, and competitive benchmarking.
    • Customer support roles include training, problem resolution, and technical account management.
    • Interact effectively with end‑users at customer sites, as well as first‑level managers.
    • Participate in account planning as part of the account team to develop the Synopsys solution to customer problems by bringing understanding of customers' needs and issues.

Key Qualifications

  • Design implementation experience should include ASIC design using industry‑standard tools (Placement, Optimization, CTS, Routing)
  • RTL to GDSII full flow experience or knowledge is preferable
  • Strong interest and understanding of Advanced Node & Design methodologies are required
  • In‑depth Synopsys back‑end tool (Logical and Physical Synthesis, AI methodologies, Timing Closure techniques, Macro Placement, Routing at advanced node, Static Timing Analysis, including noise analysis) experience and knowledge are required
  • Knowledge of several Clock Tree Synthesis methodologies like H‑Tree, MS‑CTS is preferred
  • Excellent verbal and written presentation/communication skills are mandatory
  • Customer sensitivity, the ability to multiplex many issues & set priorities, and the desire to help customers exploit new technologies are essential for success in the position

Preferred Experience

  • BSEE or equivalent, required with 7+ years of experience, or MSEE, or equivalent with 5+ years of experience
  • Tool knowledge expected: Back‑end P&R tools (Fusion Compiler, ICC2, Innovus)
  • Tool knowledge (preferred): Front‑end synthesis tools (Fusion Compiler, Design Compiler, Genus)
  • Tool knowledge (preferred): STA (Primetime, Tempus)

The Team You’ll Be A Part Of

You’ll join a high‑performing Customer Application Services team focused on delivering world‑class technical solutions and support to leading semiconductor companies. Our team collaborates closely with R&D, sales, and product groups to ensure that Synopsys customers achieve their design goals efficiently and effectively. We foster a culture of innovation, continuous learning, and mutual respect, where every member’s expertise is valued and every voice is heard.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Job ID

#J-18808-Ljbffr

Salary: EUR 72,000 – 84,000 per year

Requirements

  • Design implementation experience with ASIC design using industry‑standard tools (Placement, Optimization, CTS, Routing)
  • RTL‑to‑GDSII full flow experience or knowledge
  • Strong interest and understanding of advanced node & design methodologies
  • In‑depth experience with Synopsys back‑end tools (Logical and Physical Synthesis, AI methodologies, Timing Closure, Macro Placement, Routing at advanced node, Static Timing Analysis including noise analysis)
  • Knowledge of several Clock Tree Synthesis methodologies (e.g., H‑Tree, MS‑CTS) – preferred
  • Excellent verbal and written presentation/communication skills
  • Customer sensitivity, ability to multiplex many issues & set priorities

Responsibilities

  • Support the sale and adoption of Synopsys products to help customers achieve performance improvements in cost, quality, and development time
  • Demonstrate and evaluate Synopsys tools, especially at sub‑5nm nodes using the full RTL‑to‑GDSII solution (Fusion Compiler / IC Compiler II/ICC2)
  • Manage multiple customer activities concurrently and coordinate with Account Managers and AC management to set priorities
  • Provide product demonstrations, competitive benchmarking, training, problem resolution, and technical account management
  • Interact effectively with end‑users at customer sites and with first‑level managers
  • Participate in account planning as part of the account team to develop Synopsys solutions for customer problems

Benefits

comprehensive health, wellness, and financial benefitsmonetary and non‑monetary total rewards

Skills

ASIC physical design (place & route)Logic synthesisStatic timing analysis (STA)Clock tree synthesis (CTS)RoutingAdvanced timing optimization techniquesAI‑driven design methodologies (preferred)RTL coding (preferred)Equivalency checking (preferred)Timing & power sign‑off constraints (preferred)Fusion CompilerIC Compiler II / ICC2InnovusDesign CompilerGenusPrimetimeTempus

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