Custom Analog Enablement and Methodology, Sr Staff Engineer - 15402

About Synopsys

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Responsibilities

• Proposing and developing advanced layout design techniques and methodologies, including specification, prototyping, and building solutions with scripting languages (Tcl/Perl/Python).
• Running verification on existing designs to assess PDK update impacts and creating innovative scripts to minimize rework.
• Collaborating with multiple organizations and teams across global time zones to ensure the design environment is optimized for IP design teams.
• Working within a best-in-class IC design environment, utilizing industry-leading tools and custom in-house solutions.
• Driving the adoption of new layout methodologies by training and supporting global design teams.
• Maintaining and improving workflow automation, ensuring high productivity and quality in custom analog layout processes.

Impact

• Enhance efficiency and productivity of Synopsys IP design teams by enabling robust and scalable layout methodologies.
• Reduce design cycle times and rework through innovative scripting and workflow automation.
• Accelerate adoption of advanced technologies and nodes, keeping Synopsys at the forefront of semiconductor innovation.
• Foster cross-team collaboration, ensuring seamless integration of layout and design environments across global teams.
• Contribute to the development of industry-leading IP solutions, powering innovations in AI, automotive, IoT, and more.
• Drive continuous improvement and learning within the organization, sharing best practices and expertise with peers.

Requirements

• BS/MS in Electrical Engineering, Computer Engineering, or related field, with 5+ years of relevant experience.
• Expertise in custom analog layout design, especially with sub-5nm FinFet/Gate-All-Around nodes.
• Proficiency in scripting languages: Tcl, Perl, and Python for workflow automation and prototyping.
• Ability to debug LVS (Layout Versus Schematic) and DRC (Design Rule Check) reports effectively.
• Basic understanding of circuit design and digital synthesis/place & route workflows (ICC2/FC).

Who You Are

• Innovative thinker with a proactive approach to problem-solving.
• Strong communicator, able to articulate technical concepts clearly to diverse audiences.
• Collaborative team player, comfortable working across multiple time zones and organizational boundaries.
• Organized and detail-oriented, with excellent presentation skills.
• Adaptable and resilient, thriving in fast-paced, dynamic environments.
• Passionate engineer with a deep understanding of custom analog layout design, eager to push boundaries and innovate in the semiconductor industry.
• Thrives in fast-paced environments and is energized by the opportunity to work with cutting-edge technology nodes, including sub-5nm FinFet and Gate-All-Around.
• Possesses advanced skills in scripting languages such as Tcl, Perl, and Python, enabling the development of robust design methodologies and automation solutions.
• Curiosity drives continuous improvement in design processes.
• Adept at collaborating across global teams and time zones.
• Values clear communication, both in identifying technical challenges and presenting solutions.
• Motivated by the chance to learn, grow, and make a meaningful impact in a supportive, innovative environment.

The Team You’ll Be A Part Of

You will join the Technology Enablement team, a global group of experts dedicated to advancing custom analog layout methodologies for Synopsys IP design. The team leverages industry-leading IC design tools and custom in-house solutions, working collaboratively to innovate and optimize workflows across the latest technology nodes. Supported by experienced software and CAD professionals, the team fosters a culture of continuous learning and growth, ensuring Synopsys remains a leader in semiconductor technology.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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