Principal Manager, Virtual Platform Engineering

About

As Principal Manager in Virtual Platform Engineering, you will lead the strategy, architecture, and development of advanced virtual platforms—including SystemC TLM and QEMU—used to enable early software development, system validation, and architectural exploration for complex SoC programs. You will define technical direction, guide engineers across multiple teams, and drive execution for high-impact deliverables that influence product, architecture, and software readiness.

Key Responsibilities

Technical Leadership & Architecture

• Own the end-to-end strategy for virtual modeling of complex SoC architectures, including SystemC TLM, QEMU, and hybrid simulation flows.
• Architect, design, and guide the development of high‑fidelity SystemC TLM models that represent processors, interconnects, peripherals, and custom IP blocks.
• Establish modeling methodologies, coding standards, performance guidelines, and best practices for virtual platform development.
• Evaluate new technologies and modeling techniques; drive adoption of modern C++ features, tooling, and simulation frameworks.

Execution & Delivery

• Lead design reviews, modeling roadmaps, and technical execution across multiple SoC programs to ensure model completeness, performance, and delivery to schedule.
• Oversee integration of models into SystemC-based simulators and broader software/firmware development pipelines.
• Lead triage, debugging, and resolution of complex system‑level modeling issues across hardware, firmware, and software boundaries.
• Ensure rigorous validation through code reviews, unit testing, regression infrastructure, and continuous integration workflows.

Cross-Functional Influence

• Collaborate with senior hardware architects, design teams, firmware leaders, and software stakeholders to define modeling requirements and ensure alignment with program goals.
• Represent the virtual platform function in cross‑organizational planning, architecture discussions, and silicon program milestones.
• Drive cross‑team initiatives that improve model accuracy, usability, and overall simulation ecosystem maturity.

Team Leadership & Mentorship

• Provide technical direction, mentorship, and performance guidance to engineers developing SystemC TLM and QEMU models.
• Build and scale modeling capabilities by coaching team members, establishing best practices, and fostering a high-performance engineering culture.
• Partner with senior leadership on hiring, talent development, and long-term organizational planning for the virtual platform team.

Minimum Qualifications:

• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Software Engineering or related work experience.
• OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Software Engineering or related work experience.
• OR PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience.
• 4+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Preferred Qualifications:

• 12+ years of experience in Software, Firmware, or Systems Engineering; including 7+ years building Virtual Platforms, SystemC TLM models, or simulators.
• 3+ years of proven experience leading teams or projects with high technical complexity and cross-functional impact.
• Hands-on expertise with:
  • SystemC TLM 2.0 and/or QEMU internals
  • Modern C++ (C++14/17/20)
  • ARM Architecture (CPU, GIC, CoreSight, debug infrastructure)
  • Firmware, boot code, or low-level driver development
  • Git and modern CI/CD frameworks
  • ARM Fast Models or equivalent modeling frameworks
  • Server architecture including RAS, manageability, and platform firmware

Level of Responsibility

• Operates independently, exercising expert-level judgment and technical decision-making.
• Provides supervision, mentoring, and strategic technical guidance to other engineers.
• Makes decisions with significant impact on product architecture, program schedules, and cross-organizational strategy.
• Communicates complex concepts clearly to executives, architects, and cross-functional leaders; able to influence without authority.
• Works on problems requiring multi-step, multi-team coordination, long‑range planning, and deep system‑level problem-solving.

Technologies & Areas of Expertise:

Virtual Platforms & Simulation

• Virtual Platform Engineering
• SystemC
• SystemC TLM / TLM‑2.0
• QEMU
• Hybrid Simulation Flows
• High‑fidelity Virtual Models
• Pre‑silicon Software Enablement
• System‑level Modeling & Simulation

SoC & Hardware Architecture

• SoC Architecture
• Processor / CPU Modeling
• Interconnect Modeling
• Peripheral Modeling
• Custom IP Block Modeling
• Large‑scale SoC Programs

Programming & Modeling Languages

• C++
• Modern C++ (C++14 / C++17 / C++20)
• Object‑oriented Design
• Performance‑optimized Modeling Code

Compensation & Benefits

$218,200.00 - $327,400.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.