Lead Pre-Silicon Signoff Engineer

Advance your career at Synopsys as a Lead Pre-Silicon Signoff Engineer, driving innovations in high-speed connectivity technology. Focus on simulation and verification for PCIe and Ethernet protocols.

This role seeks an engineering leader with a master's or PhD in Electrical/Computer Engineering and over 10 years of industry experience. You will leverage your expertise in high-speed serial communication and guide junior engineers, fostering growth and collaboration across teams. Your experience with verification environments and hardware validation will be essential for achieving robust simulation outcomes.

Key Responsibilities:

• Collaborate with cross-functional teams for comprehensive design verification
• Develop simulation and verification plans aligned with targets
• Review verification plan progress in regular meetings
• Establish and report key verification metrics
• Deliver high-quality verification collateral and documentation

Requirements:

• MSc or PhD in Electrical/Computer Engineering with 10+ years of experience
• Expertise in PCIe and Ethernet protocols
• Proficiency with SystemVerilog and UVM/VMM/OVM
• Strong programming skills: Python, TCL, C/C++
• Proven leadership in mentor roles and testbench architecture

Utilize your extensive knowledge in high-speed connectivity to make a significant impact at Synopsys.