Skip to content
mimi

Principal Engineer - ASIC Physical Design

Micron Technology

Hyderabad · On-site Full-time Lead 6d ago

About the role

Req. ID

JR96651 Principal Engineer - ASIC Physical Design

About

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community.

Role

The team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group. Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities.

Requirements

  • Minimum of 15 years of hands‑on physical design implementation/IR/EM experience along with APR flow development and PPA analysis
  • STA closure at block & Full Chip
  • Experience in Advanced process technology nodes (5nm/3nm preferred)
  • Experience with Ansys Redhawk‑SC tool
  • Experience with Cadence layout tools (Innovus, Tempus, etc.)
  • Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool
  • Experience in closing all the IR issues within the block & Full chip based on feedback
  • Should be strong in fundamentals of digital electronics and microprocessors
  • Should have very good analytical skills
  • Should be able to manage team independently for sub‑system partitions closure deliverables
  • Required soft skills – English language proficiency, Good collaboration and interpersonal skills. Good analytical and Problem‑solving skills along with strong ownership, commitment and time management.
  • Bachelor’s or Masters with a relevant education is in the field of electronics and computer architecture

Preferred Skills

  • Strong verbal communication skills
  • Cadence PnR tools
  • Formal verification experience
  • Digital electronics and microprocessors experience

Job Profile(s)

ASIC Engineer 5

Relocation level

(TBD)

Before Getting Started

Please review Micron’s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that:

  • Hiring managers may view your performance appraisals, original resume, transcripts or other performance‑related documentation in your personal file. This information will be held in confidence.
  • If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.

Benefits

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Equal Opportunity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Requirements

  • Minimum of 15 years of hands-on physical design implementation/IR/EM experience along with APR flow development and PPA analysis
  • STA closure at block & Full Chip
  • Experience in Advanced process technology nodes (5nm/3nm preferred)
  • Experience with Ansys Redhawk-SC tool
  • Experience with Cadence layout tools (Innovus, Tempus, etc..)
  • Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool
  • Experience in closing all the IR issues within the block & Full chip based on feedback
  • Should be strong in fundamentals of digital electronics and microprocessors
  • Should have very good analytical skills
  • Should be able to manage team independently for sub-system partitions closure deliverables
  • Required soft skills – English language proficiency, Good collaboration and interpersonal skills.
  • Good analytical and Problem-solving skills along with strong ownership, commitment and time management.

Responsibilities

  • The team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group.
  • Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities.

Benefits

medical plansdental plansvision plansincome protectionpaid family leavepaid time-off programpaid holidays

Skills

Ansys Redhawk-SCCaliberCadence InnovusCadence TempusDRCEM analysisERCIR analysisLVSPPA analysisRC extractionSTA

Don't send a generic resume

Paste this job description into Mimi and get a resume tailored to exactly what the hiring team is looking for.

Get started free