Principal Engineer

About

Become a key contributor at Synopsys as a Principal Engineer focused on high-speed design and validation. Your role will enhance innovative solutions for PCIe and Ethernet protocols. As part of the Enterprise SerDes R&D team, you will specify architectures and validate powerful new technologies. With over 8 years of experience, your expertise in modeling, signal processing, and lab validation will be crucial in advancing high-speed connectivity solutions across the industry.

Key Responsibilities

• Define NRZ/PAM4 transceiver architecture and specifications
• Model system-level performance using MATLAB/Simulink/C
• Oversee simulation and sign-off procedures for protocols
• Validate silicon performance and algorithms in laboratory settings
• Collaborate with cross-functional engineering teams for success

Requirements

• MSc or PhD in Electrical/Computer Engineering
• Minimum of 8 years in relevant engineering roles
• Proficient in SERDES modeling and scripting
• Knowledgeable in high-speed analog/digital design
• Experience validating NRZ/PAM4 links in lab environments

Drive innovation in connectivity with your expertise at Synopsys. #J-18808-Ljbffr