Principal Verification Engineer H/F

Arteris Connects Innovation

Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation.

If you’ve held a smartphone, driven an electric car, or powered up a smart TV, you’ve already come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter.

We aim to revolutionize the way SoCs are designed and are looking for engineering talents eager to explore new design and verification methodologies and grow their expertise in both digital verification and software development.

Your Role

As a Principal Verification Engineer, you will play a leading role in developing the next generation of Arteris IP solutions, enabling verification of highly configurable chiplet interconnect architectures.

You will be part of the Advanced Engineering team and help shape the future of System-on-Chip design.

Key Responsibilities

• Lead the development of advanced test benches for next-generation interconnect validation
• Coordinate engineering activities to achieve verification objectives
• Define, document, develop, and execute RTL verification tests and coverage at system level
• Contribute to performance verification and power-aware verification
• Triaging regressions and debugging RTL designs in Verilog and SystemVerilog
• Improve and refine verification processes, methodologies, and metrics

Required

Experience & Qualifications

• 10+ years of experience in SoC digital design and verification
• Strong background in microprocessor design, cache coherency, memory ordering, and cache configuration
• Experience improving verification flows using software programming languages
• Strong RTL (Verilog) and UVM/C test bench debugging skills
• Experience integrating vendor-provided VIPs for unit and system-level verification
• Excellent problem-solving, communication, and teamwork skills
• Self-driven, able to work with minimal supervision

Desired

• Experience with Arm AMBA protocols
• Experience with digital hardware generators and related methodologies

Education

• PhD or Master’s degree in Computer Science or related field

Salary

Estimated Base Salary: €70,000 to €85,000 annually.

Your base salary will be determined based on your experience, and internal pay equity for similar roles.

About Arteris

Arteris is a leading provider of system IP for accelerating system-on-chip (SoC) development. Its Network-on-Chip (NoC) interconnect IP and SoC integration automation technology enable higher performance, lower power consumption, and faster time-to-market.

With over 300 employees worldwide and headquarters in Silicon Valley, Arteris supports companies from startups to global leaders in building next-generation electronic products.