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Lead Technical Development and Top-Level Lead for Power Management Projects

ams-OSRAM AG

On-site Full-time Lead Today

About the role

About

The ams OSRAM Group is a global leader in innovative light and sensor solutions. With more than 110 years of industry experience, we combine engineering excellence and global manufacturing with a passion for cutting‑edge innovation enabling transformative advancements in the automotive, industrial, medical, and consumer industries. “Sense the power of light” – our success is based on the deep understanding of the potential of light and distinct portfolio of emitter and sensor technologies. Around 19,700 employees worldwide drive innovations alongside societal megatrends.

The CSA division supplies sensors that bridge the gap between the world we live in and the digital world of machines. By converting physical signals – heartbeats, sounds, light waves – into data, we enable robots, cars and other devices to interact with people and improve our world. What drives CSA is a relentless desire to contribute to technology and have a meaningful impact on the world. This business thrives on solving complex problems and partnering with global leaders at the forefront of technological advancement. Our goal: to push the boundaries of sensor technology and empower innovators to make the world smarter, healthier and happier.

Responsibilities

  • Lead technical development and top‑level lead for power management projects
  • Support power device development and optimization
  • Drive methodology improvements and guidelines across projects
  • Layout and verification of complex integrated analogue/mixed‑signal CMOS circuits and blocks
  • Floorplan and execution of complex analogue/mixed‑signal CMOS circuits
  • Interface to all other tape‑out relevant departments (e.g., Assembly, Test, Probecard, Maskshop) and to external foundries
  • Technical project leadership including planning and scheduling tasks, coordinating the tasks for the project layout team
  • Perform technical project reviews
  • Technical team development and educate young team members
  • Creation and patenting of new IP
  • Provide deep technical knowledge and knowledge sharing for PMIC‑relevant layout strategies (e.g., isolation strategy, ball‑out optimization for power, power device routing, power flow and EMIR verification support)
  • Technical understanding of BCD semiconductor technology

Requirements

  • University degree in Electronics or other related technical education
  • 15+ years of experience in analog and mixed‑signal integrated circuit layout
  • Knowledge of analog and mixed‑signal blocks (e.g., ADC, DAC, LDOs, LNAs, PGA, Bandgap circuits) and layout techniques (e.g., matching, shielding, star‑point routing)
  • Knowledge on ESD, latch‑up effects and layout techniques to prevent problems, as well as possible layout solutions to prevent IR‑Drop and voltage drop
  • Deep experience in debugging check results (e.g., Design Rule Check, Layout versus Schematic)
  • Experience with relevant EDA tools for IC design (preferably Cadence Design Framework / Siemens Calibre Checktool)
  • Analytical mind for solving complex problems
  • Communication skills: ability to clearly explain technical issues within the team
  • Team‑oriented, committed to deadlines and development discipline
  • High level of commitment and flexibility – taking ownership to “make it happen”
  • Strong team player with a visible “what’s best for the company” mentality
  • Fluent in English; knowledge of German would be an advantage

Benefits

  • Competitive salaries and additional benefits based on performance, experience and qualification
  • Employment in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group G
  • Higher compensation depending on expertise and skills

Requirements

  • University degree in Electronics or other related technical education
  • 15+ years of experience in analog and mixed signal integrated circuit layout
  • Knowledge of analog and mixed signal blocks (e.g. ADC, DAC, LDO's, LNA's, PGA, Bandgap circuits ) and layout techniques (e.g. matching, shielding, star point routing )
  • Knowledge on ESD, Latch Up effects and the Layout techniques to prevent problems and possible layout solutions to prevent IR-Drop, Voltage Drop
  • Deep experience in debugging check results (e.g. Design Rule Check, Layout versus Schematic )
  • Experience of relevant EDA tools for IC design (preferably with Cadence Design Framework / Siemens Calibre Checktool)
  • Analytical mind for solving complex problems
  • Communication skills: ability to clearly explain technical issues within the team
  • Team oriented, committed to deadlines and development discipline
  • High level of commitment and flexibility - Taking ownership to "make it happen"
  • Strong team player with a visible "what's best for the company" mentality
  • Fluent in English, knowledge of German would be an advantage

Responsibilities

  • Lead technical development and toplevel lead for power management projects
  • Support power device development and optimization
  • Drive methodology improvements and guidelines across projects
  • Layout and verification of complex integrated analogue/mixed signal CMOS circuits and blocks
  • Floorplan and execution of complex analogue/mixed signal CMOS circuits
  • Interface to all other Tapeout relevant departments, e.g. Assembly, Test, Probecard, Maskshop , and also interface to external foundries
  • Technical project leadership including planning and scheduling tasks, coordinate the tasks for the project layout team
  • Performing technical project reviews
  • Technical team development and educate young team members
  • Creation and patenting of new IP
  • Deep technical knowledge and knowledge sharing for PMIC relevant layout strategies like isolation strategy, ballout optimization for power, power device routing, power flow and EMIR verification support
  • Technical understanding of BCD semiconductor technology

Benefits

competitive salariesadditional benefits based on performance, experience and qualification

Skills

ADCBandgap circuitsBCD semiconductor technologyCadence Design FrameworkCMOS circuitsDACDesign Rule CheckEDA toolsEMIR verificationESDIC designLDO'sLNA'sLayoutmixed signal CMOS circuitsPGAPMICPower managementSiemens Calibre ChecktoolVoltage Drop

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