Senior Hardware Design Engineer
European Tech Recruit
About the role
Staff Hardware Design Engineer
About
Interested in designing hardware for next-generation Network-on-Chip systems?
Join our client as a Staff Hardware Design Engineer and work on highly configurable IP for advanced SoC platforms.
We are looking for a Staff Hardware Design Engineer to design and develop hardware for high-performance, configurable Network-on-Chip (NoC) systems.
You will work closely with architecture, verification, and software teams to develop high-quality IP blocks and contribute to next-generation SoC platforms.
Responsibilities
- Design and implement RTL for configurable IP blocks
- Contribute to NoC architecture and hardware specifications
- Collaborate with verification teams to achieve coverage goals
- Ensure successful hardware/software integration
- Optimize designs for performance, timing, and power
- Improve design and verification methodologies
- Participate in technical discussions with customers and application teams
Requirements
- 5+ years of experience in SoC/IP/NoC design
- Strong knowledge of AMBA, AXI, ACE, PCIe, CXL, CHI or similar protocols
- Understanding of CPU architectures (Arm or RISC‑V) and cache systems
- Experience across the SoC design lifecycle
- Proficiency in Verilog/SystemVerilog
- Familiarity with Cadence, Synopsys, or Mentor EDA tools
- Experience with SystemC, C++, Python, or scripting languages is a plus
- Master’s degree in Electronics, Computer Engineering, or related field
- Fluent English
Application
If you are interested in this job and want to find out more then please apply or feel free to send your CV directly to me at ccanneaux@eu‑recruit.com and we can arrange to speak in more detail about this position.
Requirements
- Strong knowledge of AMBA, AXI, ACE, PCIe, CXL, CHI or similar protocols
- Understanding of CPU architectures (Arm or RISC-V) and cache systems
- Experience across the SoC design lifecycle
- Proficiency in Verilog/SystemVerilog
- Familiarity with Cadence, Synopsys, or Mentor EDA tools
- Fluent English
Responsibilities
- Design and implement RTL for configurable IP blocks
- Contribute to NoC architecture and hardware specifications
- Collaborate with verification teams to achieve coverage goals
- Ensure successful hardware/software integration
- Optimize designs for performance, timing, and power
- Improve design and verification methodologies
- Participate in technical discussions with customers and application teams
Skills
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