Senior Engineer

Excel in a pivotal role at Synopsys, leading memory interface developments for DDR and HBM solutions. Your deep technical expertise will directly enhance product integrity and performance.

Join Synopsys as a Senior Engineer with proven experience in memory interface technologies. In this role, you will oversee verification and validation efforts, facilitating collaboration among cross-functional teams. Using your skills with UVM and System Verilog, you'll enhance firmware processes and ensure robust silicon bring-up strategies.

Key Responsibilities

• Drive verification efforts for advanced memory interface solutions
• Optimize firmware for initialization and system performance
• Improve verification environments with UVM and modeling tools
• Collaborate to troubleshoot and resolve complex issues
• Develop tests to support silicon bring-up initiatives

Requirements

• Over 15 years in ASIC, firmware, or system validation
• In-depth knowledge of DDR and related protocols
• Experience with UVM-based verification systems
• Strong analytical and problem-solving capabilities
• Proven history in cross-functional project leadership

Your contributions will lead to transformative advancements in memory technology and foster a culture of excellence.