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Staff Hardware Design Engineer

ic resources

France · On-site Contract Lead 4d ago

About the role

About

A well-established semiconductor client is looking for a Staff Hardware Design Engineer to join their R&D team in Montigny-le-Bretonneux.

The company develops highly configurable interconnect IP used in advanced SoC designs across sectors like consumer electronics, automotive, aerospace, and data centres.

This is a senior‑level role suited to engineers with strong digital design experience, particularly in system‑level architecture and IP integration. You’ll take ownership of complex hardware components, working closely with international design and verification teams to deliver high‑quality, production‑ready IP.

Responsibilities

  • Leading the architecture and development of configurable IP blocks used in SoC and NoC designs.
  • Contributing to the design methodology, improving design quality and maintainability.
  • Collaborating with software and hardware teams to ensure smooth integration and alignment across the product stack.
  • Supporting the verification strategy and helping refine simulation and regression flows.
  • Acting as a senior point of contact within the team on design decisions and technical challenges.

Requirements

  • A strong background in digital hardware design with hands‑on experience across architecture, RTL design, and integration.
  • Familiarity with standard SoC protocols such as AMBA, PCIe, or CXL, and experience with CPU architectures like ARM or RISC‑V.
  • Proficiency in Verilog/SystemVerilog and scripting (e.g., Python, C++) for automation and testing.
  • A proactive, team‑oriented approach with good communication skills.
  • A technical degree (Master’s or PhD) in Electronics, Computer Engineering, or similar.

Contact

For more information, please contact Jordan Browne at IC Resources.

Requirements

  • A strong background in digital hardware design with hands-on experience across architecture, RTL design, and integration.
  • Familiarity with standard SoC protocols such as AMBA, PCIe, or CXL, and experience with CPU architectures like ARM or RISC-V.
  • Proficiency in Verilog/SystemVerilog and scripting (e.g. Python, C++) for automation and testing.
  • A proactive, team-oriented approach with good communication skills.

Responsibilities

  • Leading the architecture and development of configurable IP blocks used in SoC and NoC designs.
  • Contributing to the design methodology, improving design quality and maintainability.
  • Collaborating with software and hardware teams to ensure smooth integration and alignment across the product stack.
  • Supporting the verification strategy and helping refine simulation and regression flows.
  • Acting as a senior point of contact within the team on design decisions and technical challenges.

Skills

AMBAARMC++CXLDockerPCIePythonRISC-VRTLSystemVerilogVerilog

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