Analog Layout Methodology Engineer

About

Join Synopsys as an Analog Layout Methodology Engineer, where your expertise in custom design will push semiconductor boundaries. Collaborate globally to revolutionize design efficiency.

In this role, you will propose advanced layout techniques and utilize your scripting skills to develop robust design methodologies. With over five years of hands-on experience, you will work with cutting-edge technology to enhance production workflows. Your contributions will directly impact the effectiveness of IP design teams.

Fuel innovation in the semiconductor industry as part of Synopsys' dedicated team.

Responsibilities

• Create layout techniques and methodologies for improvement
• Conduct verification on existing designs
• Collaborate with global organizations for optimized environments
• Drive adoption of methodologies through training
• Improve automation in custom analog processes

Requirements

• BS/MS in Electrical or Computer Engineering
• 4+ years in custom analog layout design
• Expertise with Tcl, Perl, and Python
• Skill in debugging LVS and DRC reports
• Understanding of circuit design and synthesis workflows