Principal Engineer

About

Take your analog circuit design expertise to Synopsys as a Principal Engineer. Focus on high-speed interfaces, mentor talent, and lead innovative analog macro developments. At Synopsys, we seek a visionary Principal Engineer passionate about analog circuit design and high-speed SerDes IP. This role requires deep technical skills in circuit design and a collaborative spirit to mentor junior engineers. You will balance power, performance, and area trade-offs, implementing design strategies to develop cutting-edge solutions.

Responsibilities

• Own architecture and implementation of analog macro-level circuits
• Review technical progress of sub-block owners
• Develop detailed analog specifications from SerDes standards
• Optimize circuit implementations for power and performance
• Collaborate with digital RTL engineers on circuit control algorithms

Requirements

• PhD with 7+ years, or MSc with 10+ years in SerDes design
• Expertise in transistor-level circuit design
• Silicon-proven experience with TX, RX, and Clock paths
• Proficiency in EDA tools for design verification
• Strong programming skills in TCL, Python, and MATLAB

Elevate your career by driving innovation and influencing advanced analog designs at Synopsys.